The VIA Rhine III VT6105M is a 10/100Mbps Fast Ethernet controller designed to provide system designers an easy to integrate single chip solution, with advanced management and power conservation features. Featuring a 3-in-1 design the VIA VT6105M integrates the physical, media, and management layers into a single chip.
Fully compliant with IEEE 802.3/802.3u 10BASE-T and 100 BASE-X standards, the VIA VT6105M has an advanced flow control scheme that provides full and half duplex support allowing data transfers at 200Mbps in full duplex mode. The VIA VT6105M employs a VIA-developed ASIC chip that optimizes data transfer between the chip and the PCI bus providing extensive trouble shooting and management capabilities, including auto MDI/MDIX configuration, remote bootability, and TCP/IP checksum to reduce CPU utilization. The VT6105M also contains advanced power management features for low power consumption including Wake on LAN (WOL), and a low power design.
Available as a single chip or in a PCI add in card, the VIA VT6105M is equipped with enhanced management features including priority queues to increase multimedia transfer speeds, fiber mode for fiber optic networks, and enhanced V LAN for improved network performance and security.
With its integrated design and excellent feature set the VIA VT6105M is ideal for integration into network controllers, network workstations, NICs, or LAN-on-motherboard solutions, providing a manageable, integrated controller to bring high speed Ethernet connectivity to the electronics of tomorrow.
Benefits of VIA Rhine III VT6105M
Easy to Integrate: A 3-in-1 design contains the physical, media, and management layers in a single chip.
Feature Rich: The VT6105M supports many features such as auto MDI/MDIX configuration, fiber optic support, VLAN for added performance and security, priority queues to speed up multimedia transfer speeds, and TCP/IP checksum offloads to reduce CPU utilization.
Power Efficient: The VIA VT6105M provides powerful energy management features such as Wake-on-LAN, and a low power 0.22 micron CMOS design.
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» Single chip full/half duplex 10/100Mbps Fast Ethernet Management Controller
» IEEE 802.3/802.3u 10BASE-T and 100BASE-T Compatible
» 32bit PCI Bus-Master Interface
» VIA Rhine based CSR definition provides efficiency PCI bus-mastering
» Low power 100base-TX transceiver embedded
– Support 10Mbps and 100Mbps N-way Auto-negotiation operation
– Support Auto-MDIX function
» Enhancement MAC functions for 802.3 networking
» 802.1 Priority Transmit
– Maximum eight priority queues by drivers programmable
» 802.1q Multiple VLAN support
– VLAN long frames support (1518+4bytes)
– VLAN tag auto inserting and extracting on TX and RX side
– NIC auto filtering on VLAN ID optional
» IP header Checksum Offload supporting for Ipv4 frames. Support both of TCP and UDP protocol
» Support Physical, Broadcast, and Multicast addresses filtering using both hashing table look-up and perfect-match mechanisms
» 12 sets hardware 16 bit MIB counters
» Fiber Optic network support
» WFM 2.0
» DMI 2.0 (H/W)
» IO 3.3v with PCI bus 5V tolerant / Core 2.5v power, 14mmX20mm, 128pin PQFP package